You can use the IP Toolbench interface to implement a variety of NCO architectures, including ROM-based, CORDIC-based, and multiplier-based. The Altera NCO MegaCore function generates numerically controlled oscillators (NCOs) customized for Altera devices. Supports 32-bit precision for angle and magnitude ■ Source interface is compatible with the ■ IP functional simulation models for use in Altera-supported VHDL and Verilog HDL simulators Supports multiple NCO architectures: ■ Multiplier-based implementation using DSP blocks or logic elements (LEs), ■.
#Nco dsp builder software#
NCO MegaCore ® ® Description 10.1 December 2010 IP-NCO 0014 6AF7 II software compiles the ® NCO MegaCore Function User Guide. The IP core meets all functional and timing requirements for the device family and can be used in production designs. Avalon Streaming and Avalon Memory-Mapped Interfaces.
Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation.
Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Innovation Drive San Jose, CA 95134 NCO MegaCore Function User Guide Software Version: Document Date: 10.1 December 2010.